I do not have a tough time believing the 20%-30% yield numbers. But some might overreact reading them.
That podcast I linked to a few weeks ago about Morris Chang told an interesting story from his days (late 60's) as the guy running fabs for Texas Instrument. TI was cutting edge back then and they would expend massive amounts of capital to set up these new fabs. They wanted an ROI on that capital so they would charge a premium price for the newest toy on the market. That limited the number of orders and meant they were not running at full capacity.
Chang had big problems with this and went to his bosses. He said we are going about this all wrong. We will never work out the kinks if we only run sporadically. It is essential that we operate at maximum capacity to achieve the necessary yields. We must run waste to figure out what the actual problems are and if our attempts at fixing them worked or not. You cannot do that with an idle line.
It appears that this is occurring with Intel. They only ran 30,000 wafers in this testing period. TSMC claims its new plant in Arizona can run over 20,000 wafers a month. So, Intel only has one and a half months of running time to go from. This amount appears modest given the complexity of the process.